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3. AUDIO OUTPUT
The STi5519 supports a six channel analog output. In a system configuration with six analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and Dolby Surround, or the left and right front channels for a 5.1 channel surround system. The Sti5519 also provides digital output in S/PDIF format. The board supports both optical and coaxial S/PDIF outputs.
3.1 AUDIO DACS
The STi5519 supports several variations of an I2S type bus, varying the order of the data bits (leading or no leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the Sti5519 internal configuration registers. The I2S format uses four stereo data lines and three clock lines. The I2S data and clock lines can be connected directly to one or more audio DAC to generate analog audio output. The two-channel DAC is an Cirrus Logic CS4335. The DACs support up to 96kHz sampling rate. The outputs of the DACs are differential, not single ended so a buffering circuit is required. The buffer circuits use National LM833 op-amps to perform the low-pass filtering and the buffering.
4 VIDEO INTERFACE
The STi5519 integrates a PAL/NTSC encoder. It converts the digital MPEG/Sub Picture/OSD stream into a standard analog baseband PAL/NTSC signals. Six analog video outputs provide CVBS, Svideo (Y/C), and RGB formats. The three RGB signals can be configured via an internal STi5519 register setting. The encoder handles interlaced and non-interlaced mode. It can perform Closed Captions, CGMS or Teletext encoding and allows Macrovision 7.01/6.1 copy protection. The encoder supports both master and slave modes for synchronization. The buffered CVBS video is available on a RCA (cinch) style jack, S-Video on a mini-DIN and all six signals (and stereo audio) are available on a SCART connector.
5 MPEG DECODER SDRAM MEMORY
The STi5519 includes glueless interfaces to SDRAM memory for the MPEG decoder. The STi5519 supports one or two 1Mx16bit chips or a 4Mx16bit SDRAM chip. However, the board supports only a 64Mbit chip. The device used is a 4M x 16 bit, 125MHz, 3.3V, 54 pin TSOP II, Micron Technology MCT48LC4M16A2TG-7 or equivalent.
6 FLASH MEMORY
The decoder board supports a single 1Mx16bit FLASH memory device. The device is a 1M x 16, 90ns, bottom boot block, 3.3V, 48 pin TSOP II, 29F800 or equivalent.
7 SERIAL EEPROM MEMORY
An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup, etc.) and software configuration information (i.e. remote control type). Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent.
8 ATAPI DRIVE INTERFACE
The STi5519 includes a glueless ATAPI interface on-chip. While this interface limits performance of the system, it is a lower cost solution than providing external logic to interface the drive to the STi5519 frontend interface. Note: The decoder board supports the standard ATAPI electrical connections, but the software protocol within the drive is not always supported according to ATAPI specifications. Custom software may need to be developed and tested to support ATAPI drives from different manufacturers.
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